BarrenSoul, if you compiler is braindead or extremely simplistic it would do that but in the real-world on x86, the code generator will, for postincrement, defer the increment instruction until the register/memory location has been used.
An example:
int postincrement(int a) { return a++; }
int preincrement(int a) { return ++a; }
int main(void)
{
postincrement(1);
preincrement(1);
return 0;
}
And here's the assembly code GCC generates for the postincrement and preincrement functions. I've generated the assembly with the optimiser disabled (the command I used is "gcc -S a.c -O0 -fomit-frame-pointer") because with it on, the compiler realises the postincrement is useless in this example and simply doesn't do it.
_postincrement:
movl 4(%esp), %eax
incl 4(%esp)
ret
_preincrement:
incl 4(%esp)
movl 4(%esp), %eax
ret
Now, observe the length of both functions' assembly. They're identical. The only difference is the position of the 'incl' instruction which is before the 'movl 4(%esp), %eax' line for preincrement as opposed to after it for postincrement. Unless there are particular architectural issues with the hardware running the code, the preincrement and postincrement operate at the same speed.
However, it's possible that the pre and post increments could run at different speeds but that would depend on how the compiler chooses to optimise the operation in a particular situation. Realistically, it's hardly something to go to war over.
Jonathon